Logo UPRM University of Puerto Rico at Mayagüez
Department of  Electrical and Computer Engineering
Electronics/Hardware and Embedded Systems Area

INEL-6080
VLSI Systems Design

Fall Semester, 2012

“The complexity for minimum component costs has increased at a rate of roughly a factor of two per year ...  over the short term this rate can be expected to continue ... Over the longer term, ... there is no reason to believe it will not remain nearly constant for at least 10 years.”

Gordon Moore, 1965

Last Updated: August 2012

Page Contents
    1. Instructor Information
    Instructor: Dr. Manuel Jiménez
    Office: Stefani 222B
    Phone: (787)832-4040 Ext. 3780
    Office Hours: Please, refer to Current Schedule
    E-mail: mjimenez@ece.uprm.edu
    URL: http://ece.uprm.edu/~mjimenez

    2. Course Description
    INEL 6080 – VLSI Systems Design: MOS (Metal-Oxide-Semiconductor) devices and circuits. Design, implementation, and fabrication of very large scale integration (VLSI) circuits. System timing analysis. Physical implementation of computational systems.

    3. Objectives
    This course is intended to provide students an understanding of various contemporary techniques for the design, simulation, and fabrication of CMOS VLSI Digital circuits. Students will get in touch with current research in these areas at the same time that use state of the art CAD tools for evaluating and analyzing practical circuits developed as part of the class.
    After completing this course, each student should be able to design, simulate, and develop fabrication specs for CMOS VLSI digital circuits. Students should have created awareness contemporary research problems faced in the design of VLSI circuits.

    4. Prerequisites by Topic
    Students enrolled in this course are expected to have an undergraduate-level equivalent background in the following topics:
    5. Textbook and References
    Textbook:  
    N. Weste and D. Harris, "CMOS VLSI Design: A Circuits and Systems Perspective - 4th Edition", Pearson Education, Inc. publishing as Addison-Wesley, Boston, MA 02116, 2011
    Web Site:  http://www3.hmc.edu/~harris/cmosvlsi/4e/index.html

    References:

    1. J. P. Uyemura, “Introduction to VLSI Circuits and Systems”, John Wiley & Sons, Inc., New York, NY 2002
    2. S-M Kang and Y. Leblebici, "CMOS Digital Integrated Circuits: Analysis and Design", Third Edition. McGraw Hill Corporation, Inc., New York, NY 10020, 2003
    3. N. Weste and K. Eshraghian, "Principles of CMOS VLSI Design", Second Ed.Addison-Wesley Publishing, New York, NY 1993
    4. RJ Baker, "CMOS: Circuit Design, Layout, and Simulation" Third Ed., IEEE Press/Wiley-Interscience, Hoboken, NJ 2010
    5. A. Hastings, "The Art of Analog Layout", Prentice Hall, Inc.,Upper Saddle River, NJ 2001
    6. J. Rabaey, A. Chandrakasan, B. Nikolic, "Digital Integrated Circuits: A Design Perspective, 2nd Edition", Prentice Hall, Inc., 2003
    7. Z. Navabi, "VHDL Modular Design and Synthesis of Cores and Systems", Third Edition, McGraw-Hill, Inc., 2007
    8. D.A. Hodges, H.G. Jackson, R.A. Saleh, “Analysis and Design of Digital Integrated Circuits In Deep Submicrom Technology” Third Edition, McGraw-Hill 2004
    9. Technical papers from journals and conferences in Circuits and Systems and Computer Aided Design of Electronic Circuits

    6. Course Outline
    The course material is distributed in eleven main topics going from introductory to advanced concepts, as indicated below:

Topic

Contact
Hours

1.       Introduction

1.5

2.       Logic Design with MOSFETS

3.0

3.       Review of MOS Transistor Theory

3.0

4.       Fabrication Process of CMOS ICs

3.0

5.       MOS Transistor Modeling Using SPICE

1.5

6.       MOS Gates: DC & Transient Response

4.5

7.       Elements of Physical Design

3.0

8.       Advanced CMOS Techniques

3.0

9.       Design of High-speed CMOS Gates

3.0

10.   Combinational & Sequential CMOS Design

3.0

11.   I/O and Clock Design

3.0

12.  Introduction to HDLs

3.0

13.    VLSI System Components

1.5

14.   CMOS VLSI Arithmetic Components

3.0

15. Reliability and Testing of VLSI Circuits   

3.0

16.   Tests and  Presentations

4.5

Total hours:  (equivalent to contact period)

45


    7. Instructional Strategy
    The course consists mainly of lectures and laboratory sessions.  Students work in teams of two to four members on a project established at the beginning of the semester.  Handouts or electronically accessible documents are provided for selected topics.  Although the professor guides the discussion of major topics, students are encouraged to expand beyond the classroom discussion for the richness of their project and overall learning experience.

    8. Course Schedule
    The scheduled activities for the current offering of the course are outlined below.  Important events are highlighted.
     
    Event
    Due
    Description
    Links
    Intro
    Aug. 9
    First day of classes
    Syllabus
    Instructor Info
    HW#1
    TBD


    Paper#1
    TBD


    HW#2
    TBD


    Paper#2
    TBD


    Proposal
    Sep. 6
    Project Proposal
    Midterm
    Oct. 16
    Midterm Exam
    HW#3
    TBD

    -
    Paper#3
    TBD
     

    Project
    Nov. 27
    Written Project Report
    Guidelines
    Presentation
    Nov. 29
    Project Presentations
    Guidelines
    Final
    TBD
    Final Exam

    9. Grading Rule
    Evaluations will be based on one midterm exam, several homework assignments, one class project,  and a final exam.  The tables below provide the weight distribution of each category with details on the project evaluation, and the scale for final grade assignment.
     
    Grading Categories
    Category
    Weight
    Midterm Exam
    20%
    Homework
    15%
    Project
    40%
    Final Exam
    25%
    Total Points
    100%
    Project Categories
    Category
    Points
    Project Proposal
    5.0
    Progress Report
    -
    Written Report
    25
    Presentation
    10
    Total Points
    40
    Grade Scale
    Points
    Grade
    0.0 – 59.9
    F
    60.0 – 69.9
    D
    70.0 – 79.9
    C
    80.0 – 89.9
    B
    90.0 – 100
    A

    10. General Policies
    Attendance:
    1. Attendance will be monitored in the classroom at the beginning of each lecture.  It is the student responsibility to sign the attendance list to be circulated by the professor at the beginning of each class.  Attendance lists cannot be used as alibi in a court of law.
    2. Approximately, every 10 lectures an attendance report will be generated.
    3. A student with more than 3 (three) missed lectures in a reporting period will be considered not to be regularly attending class and will be reported as so in the registrar's attendance report.
    Exams:
    1. Make-up for exams will be furnished only to students with a written, valid excuse.  The professor reserves the right to determine which excuses are valid.
    2. Under no circumstance will a late take-home exam be accepted.  If an exam is not turned-in by the date and time specified, the student will receive zero in that exam.
    Homework and Assigned Readings:
    1. Homework, lectures, and reports are due in class on the dates specified in the course schedule. 
    2. Late homework and reports will be accepted with an scalating penalty of 10%, 25%, and 50% for each late day up to the third day.
    3. Lateness beyond the third day would make your work worthless (100% penalty).
    4. Students are responsible for verifying the integrity of electronically submitted materials.  Unreadable formatting will not be considered a valid submission, and therefore might lead to late penalties.
    General Behavior:
    1. Dishonesty of any kind will be dealt at the professor jurisdiction AND reported to the pertinent authorities for the appropriate disciplinary sanctions.
    2. Cellular phones and pagers must be in quiet mode during lectures and meetings and off in exams and other in-class evaluations.  No answering of calls will be allowed in the classroom.
    3. Audio or video recording equipment of any kind is not allowed in lectures.
    4. Smoking is not permitted in the classroom or laboratory.

    11. Class Materials (TBD)
    This section contains materials specific to the class.  Access to this area is restricted. Only students officially enrolled in the course will be granted access.  Here you will find:

      Under Construction

    12. Useful Links

    Tools and Tutorials:

    VLSI Services:
Other Pointers of Interest:

    Webmaster: M. Jimenez