Explanation:

Instruction	Opcode	Ra	Rb	Rc	C
LA R3, 9	00101	011	000	000	0000001001
LA R6, 3	00101	110	000	101	0000000011
LA R0,520	00101	000	000	111	0100000100
ST R6,512	00011	110	000	000	1000000000
ST R3,513	00011	011	000	111	1000000001
ST R0,1023	00011	000	000	000	1111111111
ADD R2,R3,R6	01100	010	011	110	0001000010
SUB R1,R0,R2	01110	001	000	010	0000000000
OR R4,R3,R6	10110	100	011	110	0010101010
AND R7,R4,R3	10100	111	100	011	0000000000
NOT R5,R7	11000	101	000	111	0101110000
SHR R6,2	11010	110	000	111	0000000010
MAC R3,R6,R2	01010	011	110	010	0011001100
STOP	11111	101	111	000	0011001100

Instruccion	Resulatado
2B0009	R[3] = 9
2E1403	R[6] = 3
281D04	R[0] = 520
1E0200	DISPLAY = 0300
1B1E01	DISPLAY = 0309
1803FF	MEM[1023] = 1000001000
627842	R[2] = 00001100
710800	R[1] = 1111100
B478AA	R[4] = 00001111
A78C00	R[7] = 00001001
C51D70	R[5] = 11110110
D61C02	R[6] = 00000000
53C8CC	R[3] = 00100111
FDE0CC	STOP

Instruction	Opcode	RA	RB	RC	C
LA R7,10	00101	111	000	101	0000001010
LA R2,15	00101	010	000	000	0000001111
ADD R0,R7,R2	01100	000	111	010	0111111111
SUB R1,R2,R7	01110	001	010	111	0000000000
ST R0,R7,524	00011	000	111	010	1000001100
STR R2,512	00100	010	011	101	1000000000
NEG R3,R1	01111	110	101	001	0111111111
ORI R4,R7,21	10111	100	111	010	0000010101
SHL R2,R4,R1	11100	010	100	001	0000000000
LA R6,12	00101	110	111	000	0000001100
STOP	11111	101	111	000	0011001100

Instrucción	Resultado
2F140A	R[7] = 00001010
2A000F	R[2] = 00001111
60E9FF	R[0] = 00011001
715C00	R[1] = 00000101
18EA0C	M[524+10] = 0000011001
227600	M[512+6] = 0000001111
7EA5FF
BCE815	R[4]= 00011111
E28400	R[2] = 11100000
2EE00C	R[6] = 00001100
FDE0CC	STOP