Gladys Omayra Ducoudray

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INEL4207

Courses


Fecha	Clase	Tema	Sec.	Probs.
1/15	1	Prontuario y Reglas
1/20	2	Introduccion, Inverter Function, VTC, Noise Margin, Ideal VTC	13.1.1-13.1.4	1-3,5
1/22	3	Inverter Implementation, Saturated Charge, example power dissipation, propagation Delay	13.1.5-13.1.7	9,11,13,14,16,17
1/25	4	Time delay and max frequency, power-Delay, Energy Delay Product, Si Area, Logic Families, Styles for Digital System Design, Design Abstraction	13.1.8-13.1.12	20,22,29,33, 34 Lean las secciones
1/27	5	Inversores CMOS	13.3	35,38,41, 44
1/29-2/1	6 y 7	Compuertas CMOS	13.4	47-49, 56
2/3	8	Compueratas Complejas
2/5	9	Capacitancias Internas	13.4.8, 13.5
2/5-2/8	10,11	Logica Pass Transistor	14.2	16,17, 20
2/10	12	CMOS Dinamico: Circuitos Domino	14.3	33
2/12	13	Repaso para examen
2/17	14,15	Examen 1 6:00-8:00PM
2/22	15	BJT Review	14.4
2/24-2/26	16,17	Emitter Coupled Logic	14.4	30,35,36,39
2/29	18	Time delay rise time and fall time	14.4
3/2	19	TTL	Apuntes	Pract. Prob
3/4-3/9	20-22	BiCMOS Logic, BiCMOS EXample	14.5	40-44
3/11-3/14	23,24	Latches and Flip-flops	15.1	1,5,7,8
3/16	25,26	Repaso Examen 2
3/16	27	Memory	15.2	9
3/17	28-29	Exam 2 6:00-8:00PM
3/18	30	Memory	15.2
3/28-3/30	30-31	SRAM	15.3.1	16,20-24
4/1-4/4	32-33	DRAM, Sense amplifiers	15.3.2,15.4.1	32,34, 37
4/6-4/8	34,35		15.4.2-4.4
4/11-4/12	35, 36	ROM	15.5
4/13-4/18	37, 38	Converters	Data Converters
4/19-4/20	39,40	Exam 3
4/22-4/25	39,40	Repaso Examen Fina y proyecto
4/27-4/29	41-42	dia para entregar proyecto final
5/2-5/6	43-45	Repaso Examen Final